Functions
void	XVphy_Ch2Ids (XVphy InstancePtr, XVphy_ChannelId ChId, u8 Id0, u8 *Id1)
	This function will set the channel IDs to correspond with the supplied channel ID based on the protocol. More...

XVphy_SysClkDataSelType	Pll2SysClkData (XVphy_PllType PllSelect)
	This function will translate from XVphy_PllType to XVphy_SysClkDataSelType. More...

XVphy_SysClkOutSelType	Pll2SysClkOut (XVphy_PllType PllSelect)
	This function will translate from XVphy_PllType to XVphy_SysClkOutSelType. More...

u32	XVphy_PllCalculator (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId, XVphy_DirectionType Dir, u32 PllClkInFreqHz)
	This function will try to find the necessary PLL divisor values to produce the configured line rate given the specified PLL input frequency. More...

u32	XVphy_WriteCfgRefClkSelReg (XVphy *InstancePtr, u8 QuadId)
	This function writes the current software configuration for the reference clock selections to hardware for the specified quad on all channels. More...

void	XVphy_CfgPllRefClkSel (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId, XVphy_PllRefClkSelType RefClkSel)
	Configure the PLL reference clock selection for the specified channel(s). More...

void	XVphy_CfgSysClkDataSel (XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir, XVphy_SysClkDataSelType SysClkDataSel)
	Configure the SYSCLKDATA reference clock selection for the direction. More...

void	XVphy_CfgSysClkOutSel (XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir, XVphy_SysClkOutSelType SysClkOutSel)
	Configure the SYSCLKOUT reference clock selection for the direction. More...

u32	XVphy_ClkCalcParams (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId, XVphy_DirectionType Dir, u32 PllClkInFreqHz)
	This function will try to find the necessary PLL divisor values to produce the configured line rate given the specified PLL input frequency. More...

u32	XVphy_OutDivReconfig (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId, XVphy_DirectionType Dir)
	This function will set the current output divider configuration over DRP. More...

u32	XVphy_DirReconfig (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId, XVphy_DirectionType Dir)
	This function will set the current RX/TX configuration over DRP. More...

u32	XVphy_ClkReconfig (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId)
	This function will set the current clocking settings for each channel to hardware based on the configuration stored in the driver's instance. More...

XVphy_ChannelId	XVphy_GetRcfgChId (XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir, XVphy_PllType PllType)
	Obtain the reconfiguration channel ID for given PLL type. More...

u32	XVphy_GetQuadRefClkFreq (XVphy *InstancePtr, u8 QuadId, XVphy_PllRefClkSelType RefClkType)
	Obtain the current reference clock frequency for the quad based on the reference clock type. More...

XVphy_SysClkDataSelType	XVphy_GetSysClkDataSel (XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir, XVphy_ChannelId ChId)
	Obtain the current [RT]XSYSCLKSEL[0] configuration. More...

XVphy_SysClkOutSelType	XVphy_GetSysClkOutSel (XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir, XVphy_ChannelId ChId)
	Obtain the current [RT]XSYSCLKSEL[1] configuration. More...

u32	XVphy_IsPllLocked (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId)
	This function will check the status of a PLL lock on the specified channel. More...

u32	XVphy_GtUserRdyEnable (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId, XVphy_DirectionType Dir, u8 Hold)
	This function will reset and enable the Video PHY's user core logic. More...

u32	XVphy_MmcmWriteParameters (XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir)
	This function will write the mixed-mode clock manager (MMCM) values currently stored in the driver's instance structure to hardware . More...

void	XVphy_MmcmReset (XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir, u8 Hold)
	This function will reset the mixed-mode clock manager (MMCM) core. More...

void	XVphy_MmcmLockedMaskEnable (XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir, u8 Enable)
	This function will reset the mixed-mode clock manager (MMCM) core. More...

u8	XVphy_MmcmLocked (XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir)
	This function will get the lock status of the mixed-mode clock manager (MMCM) core. More...

void	XVphy_SetBufgGtDiv (XVphy *InstancePtr, XVphy_DirectionType Dir, u8 Div)
	This function obtains the divider value of the BUFG_GT peripheral. More...

u32	XVphy_PowerDownGtPll (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId, u8 Hold)
	This function will power down the specified GT PLL. More...

void	XVphy_SetIntrHandler (XVphy InstancePtr, XVphy_IntrHandlerType HandlerType, XVphy_IntrHandler CallbackFunc, void CallbackRef)
	This function installs a callback function for the specified handler type. More...

void	XVphy_IntrEnable (XVphy *InstancePtr, XVphy_IntrHandlerType Intr)
	This function enables interrupts associated with the specified interrupt type. More...

void	XVphy_IntrDisable (XVphy *InstancePtr, XVphy_IntrHandlerType Intr)
	This function disabled interrupts associated with the specified interrupt type. More...

void	XVphy_CfgErrIntr (XVphy *InstancePtr, XVphy_ErrType ErrIrq, u8 Set)
	This function configures the error IRQ register based on the condition to generate an ERR_IRQ event. More...

u64	XVphy_GetPllVcoFreqHz (XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId, XVphy_DirectionType Dir)
	This function calculates the PLL VCO operating frequency. More...

u8	XVphy_GetRefClkSourcesCount (XVphy *InstancePtr)
	This function returns the number of active reference clock sources based in the CFG. More...

u8	XVphy_IsHDMI (XVphy *InstancePtr, XVphy_DirectionType Dir)
	This function checks if Instance is HDMI 2.0 or HDMI 2.1. More...

void	XVphy_ErrorHandler (XVphy *InstancePtr)
	This function is the error condition handler. More...

Function Documentation

XVphy_SysClkDataSelType Pll2SysClkData ( XVphy_PllType PllSelect )

This function will translate from XVphy_PllType to XVphy_SysClkDataSelType.

Parameters

InstancePtr is a pointer to the XVphy core instance.

Returns: The reference clock type based on the PLL selection.

Note: None.

Referenced by XVphy_PllInitialize().

XVphy_SysClkOutSelType Pll2SysClkOut ( XVphy_PllType PllSelect )

This function will translate from XVphy_PllType to XVphy_SysClkOutSelType.

Parameters

InstancePtr is a pointer to the XVphy core instance.

Returns: The reference clock type based on the PLL selection.

Note: None.

Referenced by XVphy_PllInitialize().

void XVphy_CfgErrIntr	(	XVphy *	InstancePtr,
		XVphy_ErrType	ErrIrq,
		u8	Set
	)

This function configures the error IRQ register based on the condition to generate an ERR_IRQ event.

Parameters

InstancePtr is a pointer to the XVphy instance. ErrIrq is the IRQ type as define in XVphy_ErrType Set is the flag to set or clear the ErrIrq param

Returns: None.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_ReadReg, and XVphy_WriteReg.

Referenced by XVphy_ClkReconfig().

void XVphy_CfgPllRefClkSel	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId,
		XVphy_PllRefClkSelType	RefClkSel
	)

Configure the PLL reference clock selection for the specified channel(s).

This is applied to both direction to the software configuration only.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
ChId	is the channel ID to operate on.
SysClkDataSel	is the reference clock selection to configure.

Returns: None.

Note: None.

References XVphy::Quads, and XVphy_Ch2Ids().

Referenced by XVphy_PllInitialize().

void XVphy_CfgSysClkDataSel	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_DirectionType	Dir,
		XVphy_SysClkDataSelType	SysClkDataSel
	)

Configure the SYSCLKDATA reference clock selection for the direction.

Same configuration applies to all channels in the quad. This is applied to the software configuration only.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.
SysClkDataSel	is the reference clock selection to configure.

Returns: None.

Note: None.

References XVphy::Quads, and XVphy_Ch2Ids().

Referenced by XVphy_PllInitialize().

void XVphy_CfgSysClkOutSel	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_DirectionType	Dir,
		XVphy_SysClkOutSelType	SysClkOutSel
	)

Configure the SYSCLKOUT reference clock selection for the direction.

Same configuration applies to all channels in the quad. This is applied to the software configuration only.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.
SysClkOutSel	is the reference clock selection to configure.

Returns: None.

Note: None.

References XVphy::Quads, and XVphy_Ch2Ids().

Referenced by XVphy_PllInitialize().

void XVphy_Ch2Ids	(	XVphy *	InstancePtr,
		XVphy_ChannelId	ChId,
		u8 *	Id0,
		u8 *	Id1
	)

This function will set the channel IDs to correspond with the supplied channel ID based on the protocol.

HDMI uses 3 channels; DP uses 4. This ID translation is done to allow other functions to operate iteratively over multiple channels.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
ChId	is the channel ID used to determine the indices.
Id0	is a pointer to the start channel ID to set.
Id1	is a pointer to the end channel ID to set.

Returns: None.

Note: The contents of Id0 and Id1 will be set according to ChId.

References XVphy::Config, XVphy_Config::RxChannels, XVphy_Config::TxChannels, XVphy_Config::UseGtAsTxTmdsClk, XVphy_Config::XcvrType, and XVphy_IsHDMI().

Referenced by XVphy_CfgLineRate(), XVphy_CfgPllRefClkSel(), XVphy_CfgSysClkDataSel(), XVphy_CfgSysClkOutSel(), XVphy_ClkCalcParams(), XVphy_ClkReconfig(), XVphy_DirReconfig(), XVphy_OutDivReconfig(), XVphy_PllCalculator(), XVphy_PowerDownGtPll(), and XVphy_SetPrbsSel().

u32 XVphy_ClkCalcParams	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId,
		XVphy_DirectionType	Dir,
		u32	PllClkInFreqHz
	)

This function will try to find the necessary PLL divisor values to produce the configured line rate given the specified PLL input frequency.

This will be done for all channels specified by ChId. This function is a wrapper for XVphy_PllCalculator.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to calculate the PLL values for.
ChId	is the channel ID to calculate the PLL values for.
Dir	is an indicator for TX or RX.
PllClkInFreqHz	is the PLL input frequency on which to base the calculations on. A value of 0 indicates to use the currently configured quad PLL reference clock. A non-zero value indicates to ignore what is currently configured in SW, and use a custom frequency instead.

Returns

XST_SUCCESS if valid PLL values were found to satisfy the constraints.
XST_FAILURE otherwise.

Note: If successful, the channel's PllParams structure will be modified with the valid PLL parameters.

References XVphy_Ch2Ids(), and XVphy_PllCalculator().

u32 XVphy_ClkReconfig	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId
	)

This function will set the current clocking settings for each channel to hardware based on the configuration stored in the driver's instance.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
ChId	is the channel ID for which to write the settings for.

Returns

XST_SUCCESS if the configuration was successful.
XST_FAILURE otherwise.

Note: None.

References XVphy::Config, XVphy::HdmiIsQpllPresent, XVphy_Config::XcvrType, XVphy_CfgErrIntr(), XVphy_Ch2Ids(), XVPHY_ERR_NO_QPLL, XVphy_ErrorHandler(), XVphy_IsHDMI(), XVPHY_LOG_EVT_CPLL_RECONFIG, XVPHY_LOG_EVT_NO_QPLL_ERR, XVPHY_LOG_EVT_PLL0_RECONFIG, XVPHY_LOG_EVT_PLL1_RECONFIG, XVPHY_LOG_EVT_QPLL_RECONFIG, and XVphy_LogWrite().

u32 XVphy_DirReconfig	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId,
		XVphy_DirectionType	Dir
	)

This function will set the current RX/TX configuration over DRP.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
ChId	is the channel ID for which to write the settings for.
Dir	is an indicator for RX or TX.

Returns

XST_SUCCESS if the configuration was successful.
XST_FAILURE otherwise.

Note: None.

References XVphy::Config, XVphy_Config::RxProtocol, XVphy_Config::TxProtocol, XVphy_Config::XcvrType, XVphy_Ch2Ids(), XVPHY_LOG_EVT_GT_RX_RECONFIG, XVPHY_LOG_EVT_GT_TX_RECONFIG, and XVphy_LogWrite().

void XVphy_ErrorHandler ( XVphy * InstancePtr )

This function is the error condition handler.

Parameters

InstancePtr	is a pointer to the VPHY instance.
ErrIrqType	is the error type

Returns: None.

Note: None.

References XVphy::ErrorCallback, and XVphy::ErrorRef.

Referenced by XVphy_ClkReconfig().

u64 XVphy_GetPllVcoFreqHz	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId,
		XVphy_DirectionType	Dir
	)

This function calculates the PLL VCO operating frequency.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.

Returns: PLL VCO frequency in Hz

Note: None.

References XVphy::HdmiRxDruIsEnabled, XVphy::HdmiRxRefClkHz, XVphy::HdmiTxRefClkHz, XVphy::Quads, XVphy_GetQuadRefClkFreq(), and XVphy_IsHDMI().

u32 XVphy_GetQuadRefClkFreq	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_PllRefClkSelType	RefClkType
	)

Obtain the current reference clock frequency for the quad based on the reference clock type.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
RefClkType	is the type to obtain the clock selection for.

Returns: The current reference clock frequency for the quad for the specified type selection.

Note: None.

References XVphy::Quads.

Referenced by XVphy_GetPllVcoFreqHz(), and XVphy_PllCalculator().

XVphy_ChannelId XVphy_GetRcfgChId	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_DirectionType	Dir,
		XVphy_PllType	PllType
	)

Obtain the reconfiguration channel ID for given PLL type.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.
PllType	is the PLL type being used by the channel.

Returns: The Channel ID to be used for reconfiguration

Note: None.

u8 XVphy_GetRefClkSourcesCount ( XVphy * InstancePtr )

This function returns the number of active reference clock sources based in the CFG.

Parameters

InstancePtr is a pointer to the XVphy core instance.

Returns: No of active REFCLK sources

Note: None.

References XVphy::Config, XVphy_Config::DruIsPresent, XVphy_Config::DruRefClkSel, XVphy_Config::RxProtocol, XVphy_Config::RxRefClkSel, XVphy_Config::TxProtocol, and XVphy_Config::TxRefClkSel.

XVphy_SysClkDataSelType XVphy_GetSysClkDataSel	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_DirectionType	Dir,
		XVphy_ChannelId	ChId
	)

Obtain the current [RT]XSYSCLKSEL[0] configuration.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.
ChId	is the channel ID which to operate on.

Returns: The current [RT]XSYSCLKSEL[0] selection.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_Config::XcvrType, and XVphy_ReadReg.

Referenced by XVphy_GetPllType(), and XVphy_IsBonded().

XVphy_SysClkOutSelType XVphy_GetSysClkOutSel	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_DirectionType	Dir,
		XVphy_ChannelId	ChId
	)

Obtain the current [RT]XSYSCLKSEL[1] configuration.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.
ChId	is the channel ID which to operate on.

Returns: The current [RT]XSYSCLKSEL[1] selection.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_Config::XcvrType, and XVphy_ReadReg.

Referenced by XVphy_GetPllType(), and XVphy_IsBonded().

u32 XVphy_GtUserRdyEnable	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId,
		XVphy_DirectionType	Dir,
		u8	Hold
	)

This function will reset and enable the Video PHY's user core logic.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
ChId	is the channel ID which to operate on.
Dir	is an indicator for TX or RX.
Hold	is an indicator whether to "hold" the reset if set to 1. If set to 0: reset, then enable.

Returns

XST_SUCCESS.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_ReadReg, and XVphy_WriteReg.

void XVphy_IntrDisable	(	XVphy *	InstancePtr,
		XVphy_IntrHandlerType	Intr
	)

This function disabled interrupts associated with the specified interrupt type.

Parameters

InstancePtr	is a pointer to the XVphy instance.
Intr	is the interrupt type/mask to disable.

Returns: None.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_ReadReg, and XVphy_WriteReg.

void XVphy_IntrEnable	(	XVphy *	InstancePtr,
		XVphy_IntrHandlerType	Intr
	)

This function enables interrupts associated with the specified interrupt type.

Parameters

InstancePtr	is a pointer to the XVphy instance.
Intr	is the interrupt type/mask to enable.

Returns: None.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_ReadReg, and XVphy_WriteReg.

u8 XVphy_IsHDMI	(	XVphy *	InstancePtr,
		XVphy_DirectionType	Dir
	)

This function checks if Instance is HDMI 2.0 or HDMI 2.1.

Parameters

InstancePtr	is a pointer to the VPHY instance.
Dir	is an indicator for RX or TX.

Returns: TRUE if HDMI 2.0 or 2.1 else FALSE.

Note: None.

References XVphy::Config, XVphy_Config::RxProtocol, and XVphy_Config::TxProtocol.

Referenced by XVphy_Ch2Ids(), XVphy_ClkReconfig(), XVphy_GetPllVcoFreqHz(), XVphy_IsPllLocked(), XVphy_MmcmStart(), and XVphy_MmcmWriteParameters().

u32 XVphy_IsPllLocked	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId
	)

This function will check the status of a PLL lock on the specified channel.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
ChId	is the channel ID which to operate on.

Returns

XST_SUCCESS if the specified PLL is locked.
XST_FAILURE otherwise.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_GetPllType(), XVphy_IsHDMI(), and XVphy_ReadReg.

u8 XVphy_MmcmLocked	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_DirectionType	Dir
	)

This function will get the lock status of the mixed-mode clock manager (MMCM) core.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.

Returns: TRUE if Locked else FALSE.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, and XVphy_ReadReg.

void XVphy_MmcmLockedMaskEnable	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_DirectionType	Dir,
		u8	Enable
	)

This function will reset the mixed-mode clock manager (MMCM) core.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.
Enable	is an indicator whether to "Enable" the locked mask if set to 1. If set to 0: reset, then disable.

Returns: None.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_ReadReg, and XVphy_WriteReg.

Referenced by XVphy_MmcmStart().

void XVphy_MmcmReset	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_DirectionType	Dir,
		u8	Hold
	)

This function will reset the mixed-mode clock manager (MMCM) core.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.
Hold	is an indicator whether to "hold" the reset if set to 1. If set to 0: reset, then enable.

Returns

XST_SUCCESS.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_ReadReg, and XVphy_WriteReg.

Referenced by XVphy_MmcmStart().

u32 XVphy_MmcmWriteParameters	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_DirectionType	Dir
	)

This function will write the mixed-mode clock manager (MMCM) values currently stored in the driver's instance structure to hardware .

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
Dir	is an indicator for TX or RX.

Returns

XST_SUCCESS if the MMCM write was successful.
XST_FAILURE otherwise, if the configuration success bit did not go low.

Note: None.

References XVphy_Quad::Mmcm, XVphy::Quads, XVphy_DrpWr(), and XVphy_IsHDMI().

Referenced by XVphy_MmcmStart().

u32 XVphy_OutDivReconfig	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId,
		XVphy_DirectionType	Dir
	)

This function will set the current output divider configuration over DRP.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
ChId	is the channel ID for which to write the settings for.
Dir	is an indicator for RX or TX.

Returns

XST_SUCCESS if the configuration was successful.
XST_FAILURE otherwise.

Note: None.

References XVphy_Ch2Ids(), XVPHY_LOG_EVT_GT_RX_RECONFIG, XVPHY_LOG_EVT_GT_TX_RECONFIG, and XVphy_LogWrite().

u32 XVphy_PllCalculator	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId,
		XVphy_DirectionType	Dir,
		u32	PllClkInFreqHz
	)

This function will try to find the necessary PLL divisor values to produce the configured line rate given the specified PLL input frequency.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to calculate the PLL values for.
ChId	is the channel ID to calculate the PLL values for.
Dir	is an indicator for TX or RX.
PllClkInFreqHz	is the PLL input frequency on which to base the calculations on. A value of 0 indicates to use the currently configured quad PLL reference clock. A non-zero value indicates to ignore what is currently configured in SW, and use a custom frequency instead.

Returns

XST_SUCCESS if valid PLL values were found to satisfy the constraints.
XST_FAILURE otherwise.

Note: If successful, the channel's PllParams structure will be modified with the valid PLL parameters.

References XVphy::Config, XVphy_Channel::LineRateHz, XVphy::Quads, XVphy_Config::XcvrType, XVphy_Ch2Ids(), and XVphy_GetQuadRefClkFreq().

Referenced by XVphy_ClkCalcParams().

u32 XVphy_PowerDownGtPll	(	XVphy *	InstancePtr,
		u8	QuadId,
		XVphy_ChannelId	ChId,
		u8	Hold
	)

This function will power down the specified GT PLL.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.
ChId	is the channel ID to power down the PLL for.
Dir	is an indicator for TX or RX.
Hold	is an indicator whether to "hold" the power down if set to 1. If set to 0: power down, then power back up.

Returns

XST_SUCCESS.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_Ch2Ids(), XVphy_ReadReg, and XVphy_WriteReg.

void XVphy_SetBufgGtDiv	(	XVphy *	InstancePtr,
		XVphy_DirectionType	Dir,
		u8	Div
	)

This function obtains the divider value of the BUFG_GT peripheral.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
Dir	is an indicator for TX or RX
Div	3-bit divider value

Returns: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_ReadReg, and XVphy_WriteReg.

void XVphy_SetIntrHandler	(	XVphy *	InstancePtr,
		XVphy_IntrHandlerType	HandlerType,
		XVphy_IntrHandler	CallbackFunc,
		void *	CallbackRef
	)

This function installs a callback function for the specified handler type.

Parameters

InstancePtr	is a pointer to the XVPhy instance.
HandlerType	is the interrupt handler type which specifies which interrupt event to attach the callback for.
CallbackFunc	is the address to the callback function.
CallbackRef	is the user data item that will be passed to the callback function when it is invoked.

Returns: None.

Note: None.

References XVphy::IntrCpllLockCallbackRef, XVphy::IntrCpllLockHandler, XVphy::IntrQpll1LockCallbackRef, XVphy::IntrQpll1LockHandler, XVphy::IntrQpllLockCallbackRef, XVphy::IntrQpllLockHandler, XVphy::IntrRxClkDetFreqChangeCallbackRef, XVphy::IntrRxClkDetFreqChangeHandler, XVphy::IntrRxMmcmLockCallbackRef, XVphy::IntrRxMmcmLockHandler, XVphy::IntrRxResetDoneCallbackRef, XVphy::IntrRxResetDoneHandler, XVphy::IntrRxTmrTimeoutCallbackRef, XVphy::IntrRxTmrTimeoutHandler, XVphy::IntrTxAlignDoneCallbackRef, XVphy::IntrTxAlignDoneHandler, XVphy::IntrTxClkDetFreqChangeCallbackRef, XVphy::IntrTxClkDetFreqChangeHandler, XVphy::IntrTxMmcmLockCallbackRef, XVphy::IntrTxMmcmLockHandler, XVphy::IntrTxResetDoneCallbackRef, XVphy::IntrTxResetDoneHandler, XVphy::IntrTxTmrTimeoutCallbackRef, and XVphy::IntrTxTmrTimeoutHandler.

u32 XVphy_WriteCfgRefClkSelReg	(	XVphy *	InstancePtr,
		u8	QuadId
	)

This function writes the current software configuration for the reference clock selections to hardware for the specified quad on all channels.

Parameters

InstancePtr	is a pointer to the XVphy core instance.
QuadId	is the GT quad ID to operate on.

Returns

XST_SUCCESS.

Note: None.

References XVphy_Config::BaseAddr, XVphy::Config, XVphy_Channel::CpllRefClkSel, XVphy::Quads, XVphy_Channel::RxDataRefClkSel, XVphy_Channel::RxOutRefClkSel, XVphy_Channel::TxDataRefClkSel, XVphy_Channel::TxOutRefClkSel, XVphy_Config::XcvrType, and XVphy_WriteReg.

Referenced by XVphy_PllInitialize().

Functions

Function Documentation