 |
dphy
Vitis Drivers API Documentation
|
|
dphy
Vitis Drivers API Documentation
|
Data Structures | |
| struct | XDphy_Config |
| The configuration structure for DPHY. More... | |
| struct | XDphy |
| The XDphy Controller driver instance data. More... | |
Macros | |
| #define | XDPHY_H_ |
| Prevent circular inclusions by using protection macros. More... | |
DPHY Modes | |
| #define | XDPHY_MODE_MIN 0 |
| Lower limit for Mode. More... | |
| #define | XDPHY_LOW_POWER_MODE 0 |
| Lane in Low Power Mode. More... | |
| #define | XDPHY_HIGH_POWER_MODE 1 |
| Lane in High Power Mode. More... | |
| #define | XDPHY_ESCAPE_MODE 2 |
| Lane in Escape Mode. More... | |
| #define | XDPHY_MODE_MAX 2 |
| Upper Limit for mode. More... | |
| #define | XDPHY_MAX_LANES_V10 4 |
| V1.0 supports 4 Lanes. More... | |
DPHY Info Handles | |
| #define | XDPHY_HANDLE_MIN 0 |
| Lower Bound for XDPHY_HANDLE. More... | |
| #define | XDPHY_HANDLE_IDELAY 0 |
| Handle for IDELAY Reg. More... | |
| #define | XDPHY_HANDLE_INIT_TIMER 1 |
| Handle for Initialization Timer. More... | |
| #define | XDPHY_HANDLE_WAKEUP 2 |
| Handle for Wakeup timer. More... | |
| #define | XDPHY_HANDLE_HSTIMEOUT 3 |
| Handle for HS Timeout. More... | |
| #define | XDPHY_HANDLE_ESCTIMEOUT 4 |
| Handle for Escape Timeout. More... | |
| #define | XDPHY_HANDLE_CLKLANE 5 |
| Handle for Clock Lane. More... | |
| #define | XDPHY_HANDLE_DLANE0 6 |
| Handle for Data Lane 0. More... | |
| #define | XDPHY_HANDLE_DLANE1 7 |
| Handle for Data Lane 1. More... | |
| #define | XDPHY_HANDLE_DLANE2 8 |
| Handle for Data Lane 2. More... | |
| #define | XDPHY_HANDLE_DLANE3 9 |
| Handle for Data Lane 3. More... | |
| #define | XDPHY_HANDLE_HSSETTLE 10 |
| Handle for HS SETTLE. More... | |
| #define | XDPHY_HANDLE_DLANE4 11 |
| Handle for Data Lane 4. More... | |
| #define | XDPHY_HANDLE_DLANE5 12 |
| Handle for Data Lane 5. More... | |
| #define | XDPHY_HANDLE_DLANE6 13 |
| Handle for Data Lane 6. More... | |
| #define | XDPHY_HANDLE_DLANE7 14 |
| Handle for Data Lane 7. More... | |
| #define | XDPHY_HANDLE_HSSETTLE1 15 |
| Handle for HS SETTLE L1. More... | |
| #define | XDPHY_HANDLE_HSSETTLE2 16 |
| Handle for HS SETTLE L2. More... | |
| #define | XDPHY_HANDLE_HSSETTLE3 17 |
| Handle for HS SETTLE L3. More... | |
| #define | XDPHY_HANDLE_HSSETTLE4 18 |
| Handle for HS SETTLE. More... | |
| #define | XDPHY_HANDLE_HSSETTLE5 19 |
| Handle for HS SETTLE L1. More... | |
| #define | XDPHY_HANDLE_HSSETTLE6 20 |
| Handle for HS SETTLE L2. More... | |
| #define | XDPHY_HANDLE_HSSETTLE7 21 |
| Handle for HS SETTLE L3. More... | |
| #define | XDPHY_HANDLE_MAX 21 |
| Upper Bound for XDPHY_HANDLE. More... | |
DPHY HSTIMEOUT range | |
| #define | XDPHY_HS_TIMEOUT_MIN_VALUE 10000UL |
| #define | XDPHY_HS_TIMEOUT_MAX_VALUE 65541UL |
DPHY HSSETTLE range | |
| #define | XDPHY_HS_SETTLE_MAX_VALUE 0x1FF |
DPHY Flags to Enable or Disable core | |
| #define | XDPHY_ENABLE_FLAG 1 |
| #define | XDPHY_DISABLE_FLAG 0 |
Functions | |
| XDphy_Config * | XDphy_LookupConfig (u32 DeviceId) |
| Look up the hardware configuration for a device instance. More... | |
| u32 | XDphy_CfgInitialize (XDphy *InstancePtr, XDphy_Config *CfgPtr, UINTPTR EffectiveAddr) |
| Initialize the XDphy instance provided by the caller based on the given Config structure. More... | |
| u32 | XDphy_Configure (XDphy *InstancePtr, u8 Handle, u32 Value) |
| Configure the registers of the Dphy instance. More... | |
| u32 | XDphy_GetInfo (XDphy *InstancePtr, u8 Handle) |
| Get information stored in the DPhy instance based on the handle passed. More... | |
| void | XDphy_Reset (XDphy *InstancePtr) |
| This is used to do a soft reset of the DPhy IP instance. More... | |
| void | XDphy_ClearDataLane (XDphy *InstancePtr, u8 DataLane, u32 Mask) |
| This is used to clear the Abort Error (Escape or High Speed) bits in the Data Lane 0 through 3. More... | |
| u32 | XDphy_GetClkLaneStatus (XDphy *InstancePtr) |
| This is used to get information about Clock Lane status. More... | |
| u32 | XDphy_GetClkLaneMode (XDphy *InstancePtr) |
| This is used to get specific Lane mode information about Clock Lane. More... | |
| u32 | XDphy_GetDataLaneStatus (XDphy *InstancePtr, u8 DataLane) |
| This is used to get information about a Data Lane status. More... | |
| u16 | XDphy_GetPacketCount (XDphy *InstancePtr, u8 DataLane) |
| This is used to get count of packets received on each lane. More... | |
| u8 | XDphy_GetDLCalibStatus (XDphy *InstancePtr, u8 DataLane) |
| This is used to get Data Lane Calibration status. More... | |
| u32 | XDphy_GetDataLaneMode (XDphy *InstancePtr, u8 DataLane) |
| This is used to get specfic Lane mode information about a Data Lane. More... | |
| void | XDphy_Activate (XDphy *InstancePtr, u8 Flag) |
| This function is used to enable or disable the DPhy core. More... | |
| u8 | XDphy_GetRegIntfcPresent (XDphy *InstancePtr) |
| Get if register interface is present from the config structure for specified DPHY instance. More... | |
| u32 | XDphy_SelfTest (XDphy *InstancePtr) |
| Runs a self-test on the driver/device. More... | |