dphy
Vitis Drivers API Documentation
Overview

Data Structures

struct  XDphy_Config
 The configuration structure for DPHY. More...
 
struct  XDphy
 The XDphy Controller driver instance data. More...
 

Macros

#define XDPHY_H_
 Prevent circular inclusions by using protection macros. More...
 

Functions

u32 XDphy_CfgInitialize (XDphy *InstancePtr, XDphy_Config *CfgPtr, UINTPTR EffectiveAddr)
 Initialize the XDphy instance provided by the caller based on the given Config structure. More...
 
u32 XDphy_Configure (XDphy *InstancePtr, u8 Handle, u32 Value)
 Configure the registers of the Dphy instance. More...
 
u8 XDphy_GetRegIntfcPresent (XDphy *InstancePtr)
 Get if register interface is present from the config structure for specified DPHY instance. More...
 
u32 XDphy_GetInfo (XDphy *InstancePtr, u8 Handle)
 Get information stored in the DPhy instance based on the handle passed. More...
 
void XDphy_Reset (XDphy *InstancePtr)
 This is used to do a soft reset of the DPhy IP instance. More...
 
void XDphy_ClearDataLane (XDphy *InstancePtr, u8 DataLane, u32 Mask)
 This is used to clear the Abort Error (Escape or High Speed) bits in the Data Lane 0 through 3. More...
 
u32 XDphy_GetClkLaneStatus (XDphy *InstancePtr)
 This is used to get information about Clock Lane status. More...
 
u32 XDphy_GetClkLaneMode (XDphy *InstancePtr)
 This is used to get specific Lane mode information about Clock Lane. More...
 
u32 XDphy_GetDataLaneStatus (XDphy *InstancePtr, u8 DataLane)
 This is used to get information about a Data Lane status. More...
 
u8 XDphy_GetDLCalibStatus (XDphy *InstancePtr, u8 DataLane)
 This is used to get Data Lane Calibration status. More...
 
u32 XDphy_GetDataLaneMode (XDphy *InstancePtr, u8 DataLane)
 This is used to get specfic Lane mode information about a Data Lane. More...
 
u16 XDphy_GetPacketCount (XDphy *InstancePtr, u8 DataLane)
 This is used to get count of packets received on each lane. More...
 
void XDphy_Activate (XDphy *InstancePtr, u8 Flag)
 This function is used to enable or disable the DPhy core. More...
 
XDphy_ConfigXDphy_LookupConfig (u32 DeviceId)
 Look up the hardware configuration for a device instance. More...
 
u32 XDphy_SelfTest (XDphy *InstancePtr)
 Runs a self-test on the driver/device. More...
 

DPHY Modes

#define XDPHY_MODE_MIN   0
 Lower limit for Mode. More...
 
#define XDPHY_LOW_POWER_MODE   0
 Lane in Low Power Mode. More...
 
#define XDPHY_HIGH_POWER_MODE   1
 Lane in High Power Mode. More...
 
#define XDPHY_ESCAPE_MODE   2
 Lane in Escape Mode. More...
 
#define XDPHY_MODE_MAX   2
 Upper Limit for mode. More...
 
#define XDPHY_MAX_LANES_V10   4
 V1.0 supports 4 Lanes. More...
 

DPHY Info Handles

#define XDPHY_HANDLE_MIN   0
 Lower Bound for XDPHY_HANDLE. More...
 
#define XDPHY_HANDLE_IDELAY   0
 Handle for IDELAY Reg. More...
 
#define XDPHY_HANDLE_INIT_TIMER   1
 Handle for Initialization Timer. More...
 
#define XDPHY_HANDLE_WAKEUP   2
 Handle for Wakeup timer. More...
 
#define XDPHY_HANDLE_HSTIMEOUT   3
 Handle for HS Timeout. More...
 
#define XDPHY_HANDLE_ESCTIMEOUT   4
 Handle for Escape Timeout. More...
 
#define XDPHY_HANDLE_CLKLANE   5
 Handle for Clock Lane. More...
 
#define XDPHY_HANDLE_DLANE0   6
 Handle for Data Lane 0. More...
 
#define XDPHY_HANDLE_DLANE1   7
 Handle for Data Lane 1. More...
 
#define XDPHY_HANDLE_DLANE2   8
 Handle for Data Lane 2. More...
 
#define XDPHY_HANDLE_DLANE3   9
 Handle for Data Lane 3. More...
 
#define XDPHY_HANDLE_HSSETTLE   10
 Handle for HS SETTLE. More...
 
#define XDPHY_HANDLE_DLANE4   11
 Handle for Data Lane 4. More...
 
#define XDPHY_HANDLE_DLANE5   12
 Handle for Data Lane 5. More...
 
#define XDPHY_HANDLE_DLANE6   13
 Handle for Data Lane 6. More...
 
#define XDPHY_HANDLE_DLANE7   14
 Handle for Data Lane 7. More...
 
#define XDPHY_HANDLE_HSSETTLE1   15
 Handle for HS SETTLE L1. More...
 
#define XDPHY_HANDLE_HSSETTLE2   16
 Handle for HS SETTLE L2. More...
 
#define XDPHY_HANDLE_HSSETTLE3   17
 Handle for HS SETTLE L3. More...
 
#define XDPHY_HANDLE_HSSETTLE4   18
 Handle for HS SETTLE. More...
 
#define XDPHY_HANDLE_HSSETTLE5   19
 Handle for HS SETTLE L1. More...
 
#define XDPHY_HANDLE_HSSETTLE6   20
 Handle for HS SETTLE L2. More...
 
#define XDPHY_HANDLE_HSSETTLE7   21
 Handle for HS SETTLE L3. More...
 
#define XDPHY_HANDLE_MAX   21
 Upper Bound for XDPHY_HANDLE. More...
 

DPHY HSTIMEOUT range

#define XDPHY_HS_TIMEOUT_MIN_VALUE   10000UL
 
#define XDPHY_HS_TIMEOUT_MAX_VALUE   65541UL
 

DPHY HSSETTLE range

#define XDPHY_HS_SETTLE_MAX_VALUE   0x1FF
 

DPHY Flags to Enable or Disable core

#define XDPHY_ENABLE_FLAG   1
 
#define XDPHY_DISABLE_FLAG   0
 

Macro Definition Documentation

#define XDPHY_ESCAPE_MODE   2

Lane in Escape Mode.

#define XDPHY_H_

Prevent circular inclusions by using protection macros.

#define XDPHY_HANDLE_CLKLANE   5

Handle for Clock Lane.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_DLANE0   6

Handle for Data Lane 0.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_DLANE1   7

Handle for Data Lane 1.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_DLANE2   8

Handle for Data Lane 2.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_DLANE3   9

Handle for Data Lane 3.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_DLANE4   11

Handle for Data Lane 4.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_DLANE5   12

Handle for Data Lane 5.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_DLANE6   13

Handle for Data Lane 6.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_DLANE7   14

Handle for Data Lane 7.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_ESCTIMEOUT   4

Handle for Escape Timeout.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_HSSETTLE   10

Handle for HS SETTLE.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_HSSETTLE1   15

Handle for HS SETTLE L1.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_HSSETTLE2   16

Handle for HS SETTLE L2.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_HSSETTLE3   17

Handle for HS SETTLE L3.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_HSSETTLE4   18

Handle for HS SETTLE.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_HSSETTLE5   19

Handle for HS SETTLE L1.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_HSSETTLE6   20

Handle for HS SETTLE L2.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_HSSETTLE7   21

Handle for HS SETTLE L3.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_HSTIMEOUT   3

Handle for HS Timeout.

Referenced by XDphy_Configure(), XDphy_GetInfo(), and XDphy_SelfTest().

#define XDPHY_HANDLE_IDELAY   0

Handle for IDELAY Reg.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_INIT_TIMER   1

Handle for Initialization Timer.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_MAX   21

Upper Bound for XDPHY_HANDLE.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HANDLE_MIN   0

Lower Bound for XDPHY_HANDLE.

#define XDPHY_HANDLE_WAKEUP   2

Handle for Wakeup timer.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_HIGH_POWER_MODE   1

Lane in High Power Mode.

#define XDPHY_LOW_POWER_MODE   0

Lane in Low Power Mode.

#define XDPHY_MAX_LANES_V10   4

V1.0 supports 4 Lanes.

Referenced by XDphy_Configure(), and XDphy_GetInfo().

#define XDPHY_MODE_MAX   2

Upper Limit for mode.

#define XDPHY_MODE_MIN   0

Lower limit for Mode.

Function Documentation

void XDphy_Activate ( XDphy InstancePtr,
u8  Flag 
)

This function is used to enable or disable the DPhy core.

Parameters
InstancePtris the XDphy instance to operate on.
Flagdenoting whether to enable or disable the DPhy core
Returns
None.
Note
None.

References XDphy_Config::BaseAddr, XDphy::Config, XDphy_Config::IsRegisterPresent, XDPHY_CTRL_REG_DPHYEN_MASK, and XDPHY_CTRL_REG_OFFSET.

u32 XDphy_CfgInitialize ( XDphy InstancePtr,
XDphy_Config CfgPtr,
UINTPTR  EffectiveAddr 
)

Initialize the XDphy instance provided by the caller based on the given Config structure.

Parameters
InstancePtris the XDphy instance to operate on.
CfgPtris the device configuration structure containing information about a specific DPhy instance.
EffectiveAddris the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used.
Returns
  • XST_SUCCESS Initialization was successful.
Note
None.

References XDphy_Config::BaseAddr, XDphy::Config, and XDphy::IsReady.

Referenced by DphySelfTestExample().

void XDphy_ClearDataLane ( XDphy InstancePtr,
u8  DataLane,
u32  Mask 
)

This is used to clear the Abort Error (Escape or High Speed) bits in the Data Lane 0 through 3.

Parameters
InstancePtris the XDphy instance to operate on.
DataLanerepresents which Data Lane to act upon
Maskcontains information about which bits to reset
Returns
None
Note
None.

References XDphy_Config::BaseAddr, XDphy::Config, XDphy_Config::IsRegisterPresent, XDPHY_DL0STATUS_REG_OFFSET, XDPHY_DLXSTATUS_REG_ESCABRT_MASK, and XDPHY_DLXSTATUS_REG_HSABRT_MASK.

u32 XDphy_Configure ( XDphy InstancePtr,
u8  Handle,
u32  Value 
)
u32 XDphy_GetClkLaneMode ( XDphy InstancePtr)

This is used to get specific Lane mode information about Clock Lane.

Parameters
InstancePtris the XDphy instance to operate on.
Returns
Bitmask containing mode in which the Clock Lane in DPhy is in.
Note
None.

References XDphy::Config, XDphy_Config::IsRegisterPresent, XDPHY_CLSTATUS_REG_MODE_MASK, and XDphy_GetClkLaneStatus().

u32 XDphy_GetClkLaneStatus ( XDphy InstancePtr)

This is used to get information about Clock Lane status.

Parameters
InstancePtris the XDphy instance to operate on.
Returns
Bitmask containing which of the events have occured along with the mode of the Clock Lane in DPhy
Note
None.

References XDphy_Config::BaseAddr, XDphy::Config, XDphy_Config::IsRegisterPresent, and XDPHY_CLSTATUS_REG_OFFSET.

Referenced by XDphy_GetClkLaneMode().

u32 XDphy_GetDataLaneMode ( XDphy InstancePtr,
u8  DataLane 
)

This is used to get specfic Lane mode information about a Data Lane.

Parameters
InstancePtris the XDphy instance to operate on.
DataLanefor which the mode info is requested.
Returns
Bitmask containing mode in which the Data Lane in DPhy is in.
Note
None.

References XDphy::Config, XDphy_Config::IsRegisterPresent, XDPHY_DLXSTATUS_REG_MODE_MASK, and XDphy_GetDataLaneStatus().

u32 XDphy_GetDataLaneStatus ( XDphy InstancePtr,
u8  DataLane 
)

This is used to get information about a Data Lane status.

Parameters
InstancePtris the XDphy instance to operate on.
DataLanefor which the status is sought for.
Returns
Bitmask containing which of the events have occured along with the mode of the Data Lane in DPhy
Note
None.

References XDphy_Config::BaseAddr, XDphy::Config, XDphy_Config::IsRegisterPresent, and XDPHY_DL0STATUS_REG_OFFSET.

Referenced by XDphy_GetDataLaneMode().

u8 XDphy_GetDLCalibStatus ( XDphy InstancePtr,
u8  DataLane 
)

This is used to get Data Lane Calibration status.

Parameters
InstancePtris the XDphy instance to operate on.
DataLanefor which the calib status is sought for.
Returns
XST_SUCCESS - Calibration Complete, Calibration packet received XST_NO_DATA - Calibration Complete, Calibration packet is not received XST_FAILURE - Calibration failed
Note
None.

References XDphy_Config::BaseAddr, XDphy::Config, XDphy_Config::IsRegisterPresent, XDPHY_DL0STATUS_REG_OFFSET, XDPHY_DLXSTATUS_REG_CALIB_COMPLETE_MASK, and XDPHY_DLXSTATUS_REG_CALIB_STATUS_MASK.

u32 XDphy_GetInfo ( XDphy InstancePtr,
u8  Handle 
)

Get information stored in the DPhy instance based on the handle passed.

Parameters
InstancePtris the XDphy instance to operate on.
Handleto one of the registers to be configured
Returns
The value stored in the corresponding register
Note
None.

References XDphy::Config, XDphy_Config::EnableTimeOutRegs, XDphy_Config::EscTimeout, XDphy_Config::HSTimeOut, XDphy_Config::IsRegisterPresent, XDphy_Config::IsRx, XDphy_Config::MaxLanesPresent, XDPHY_CLSTATUS_REG_OFFSET, XDPHY_DL0STATUS_REG_OFFSET, XDPHY_DL1STATUS_REG_OFFSET, XDPHY_DL2STATUS_REG_OFFSET, XDPHY_DL3STATUS_REG_OFFSET, XDPHY_DL4STATUS_REG_OFFSET, XDPHY_DL5STATUS_REG_OFFSET, XDPHY_DL6STATUS_REG_OFFSET, XDPHY_DL7STATUS_REG_OFFSET, XDPHY_ESCTIMEOUT_REG_OFFSET, XDPHY_HANDLE_CLKLANE, XDPHY_HANDLE_DLANE0, XDPHY_HANDLE_DLANE1, XDPHY_HANDLE_DLANE2, XDPHY_HANDLE_DLANE3, XDPHY_HANDLE_DLANE4, XDPHY_HANDLE_DLANE5, XDPHY_HANDLE_DLANE6, XDPHY_HANDLE_DLANE7, XDPHY_HANDLE_ESCTIMEOUT, XDPHY_HANDLE_HSSETTLE, XDPHY_HANDLE_HSSETTLE1, XDPHY_HANDLE_HSSETTLE2, XDPHY_HANDLE_HSSETTLE3, XDPHY_HANDLE_HSSETTLE4, XDPHY_HANDLE_HSSETTLE5, XDPHY_HANDLE_HSSETTLE6, XDPHY_HANDLE_HSSETTLE7, XDPHY_HANDLE_HSTIMEOUT, XDPHY_HANDLE_IDELAY, XDPHY_HANDLE_INIT_TIMER, XDPHY_HANDLE_MAX, XDPHY_HANDLE_WAKEUP, XDPHY_HSEXIT_IDELAY_REG_OFFSET, XDPHY_HSSETTLE1_REG_OFFSET, XDPHY_HSSETTLE2_REG_OFFSET, XDPHY_HSSETTLE3_REG_OFFSET, XDPHY_HSSETTLE4_REG_OFFSET, XDPHY_HSSETTLE5_REG_OFFSET, XDPHY_HSSETTLE6_REG_OFFSET, XDPHY_HSSETTLE7_REG_OFFSET, XDPHY_HSSETTLE_REG_OFFSET, XDPHY_HSTIMEOUT_REG_OFFSET, XDPHY_INIT_REG_OFFSET, XDPHY_MAX_LANES_V10, and XDPHY_WAKEUP_REG_OFFSET.

Referenced by XDphy_SelfTest().

u16 XDphy_GetPacketCount ( XDphy InstancePtr,
u8  DataLane 
)

This is used to get count of packets received on each lane.

Parameters
InstancePtris the XDphy instance to operate on.
DataLanefor which the mode info is requested.
Returns
Bitmask containing mode in which the Data Lane in DPhy is in.
Note
None.

References XDphy_Config::BaseAddr, XDphy::Config, XDphy_Config::IsRegisterPresent, XDPHY_DL0STATUS_REG_OFFSET, XDPHY_DLXSTATUS_REG_PACKCOUNT_OFFSET, and XDPHY_DLXSTATUS_REG_PACKETCOUNT_MASK.

u8 XDphy_GetRegIntfcPresent ( XDphy InstancePtr)

Get if register interface is present from the config structure for specified DPHY instance.

Parameters
InstancePtris the XDphy instance to operate on.
Returns
  • 1 if register interface is present
  • 0 if register interface is absent
Note
None.

References XDphy::Config, and XDphy_Config::IsRegisterPresent.

Referenced by DphySelfTestExample().

XDphy_Config * XDphy_LookupConfig ( u32  DeviceId)

Look up the hardware configuration for a device instance.

Parameters
DeviceIdis the unique device ID of the device to lookup for
Returns
The reference to the configuration record in the configuration table (in xdphy_g.c) corresponding to the Device ID or if not found,a NULL pointer is returned.
Note
None

Referenced by DphySelfTestExample().

void XDphy_Reset ( XDphy InstancePtr)

This is used to do a soft reset of the DPhy IP instance.

The reset takes approx 20 core clock cycles to become effective.

Parameters
InstancePtris the XDphy instance to operate on.
Returns
None
Note
None.

References XDphy::Config, XDphy::IsReady, XDphy_Config::IsRegisterPresent, XDPHY_CTRL_REG_OFFSET, and XDPHY_CTRL_REG_SOFTRESET_MASK.

u32 XDphy_SelfTest ( XDphy InstancePtr)

Runs a self-test on the driver/device.

This test checks if HS Timeout value present in register matches the one from the generated file.

Parameters
InstancePtris a pointer to the XDphy instance.
Returns
  • XST_SUCCESS if self-test was successful
  • XST_FAILURE if the read value was not equal to _g.c file
Note
None.

References XDphy::Config, XDphy_Config::HSTimeOut, XDphy_GetInfo(), and XDPHY_HANDLE_HSTIMEOUT.

Referenced by DphySelfTestExample().