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Arduino driver library for Decawave DW1000
Dec 20 2016
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Go to the source code of this file.
Macros | |
| #define | LEN_STAMP 5 |
| #define | IDLE_MODE 0x00 |
| #define | RX_MODE 0x01 |
| #define | TX_MODE 0x02 |
| #define | JUNK 0x00 |
| #define | NO_SUB 0xFF |
| #define | DEV_ID 0x00 |
| #define | LEN_DEV_ID 4 |
| #define | EUI 0x01 |
| #define | LEN_EUI 8 |
| #define | PANADR 0x03 |
| #define | LEN_PANADR 4 |
| #define | SYS_CFG 0x04 |
| #define | LEN_SYS_CFG 4 |
| #define | FFEN_BIT 0 |
| #define | FFBC_BIT 1 |
| #define | FFAB_BIT 2 |
| #define | FFAD_BIT 3 |
| #define | FFAA_BIT 4 |
| #define | FFAM_BIT 5 |
| #define | FFAR_BIT 6 |
| #define | DIS_DRXB_BIT 12 |
| #define | DIS_STXP_BIT 18 |
| #define | HIRQ_POL_BIT 9 |
| #define | RXAUTR_BIT 29 |
| #define | PHR_MODE_SUB 16 |
| #define | LEN_PHR_MODE_SUB 2 |
| #define | RXM110K_BIT 22 |
| #define | SYS_CTRL 0x0D |
| #define | LEN_SYS_CTRL 4 |
| #define | SFCST_BIT 0 |
| #define | TXSTRT_BIT 1 |
| #define | TXDLYS_BIT 2 |
| #define | TRXOFF_BIT 6 |
| #define | WAIT4RESP_BIT 7 |
| #define | RXENAB_BIT 8 |
| #define | RXDLYS_BIT 9 |
| #define | SYS_STATUS 0x0F |
| #define | LEN_SYS_STATUS 5 |
| #define | CPLOCK_BIT 1 |
| #define | AAT_BIT 3 |
| #define | TXFRB_BIT 4 |
| #define | TXPRS_BIT 5 |
| #define | TXPHS_BIT 6 |
| #define | TXFRS_BIT 7 |
| #define | LDEDONE_BIT 10 |
| #define | RXPHE_BIT 12 |
| #define | RXDFR_BIT 13 |
| #define | RXFCG_BIT 14 |
| #define | RXFCE_BIT 15 |
| #define | RXRFSL_BIT 16 |
| #define | RXRFTO_BIT 17 |
| #define | LDEERR_BIT 18 |
| #define | RFPLL_LL_BIT 24 |
| #define | CLKPLL_LL_BIT 25 |
| #define | SYS_MASK 0x0E |
| #define | LEN_SYS_MASK 4 |
| #define | SYS_TIME 0x06 |
| #define | LEN_SYS_TIME LEN_STAMP |
| #define | RX_TIME 0x15 |
| #define | LEN_RX_TIME 14 |
| #define | RX_STAMP_SUB 0x00 |
| #define | FP_AMPL1_SUB 0x07 |
| #define | LEN_RX_STAMP LEN_STAMP |
| #define | LEN_FP_AMPL1 2 |
| #define | RX_FQUAL 0x12 |
| #define | LEN_RX_FQUAL 8 |
| #define | STD_NOISE_SUB 0x00 |
| #define | FP_AMPL2_SUB 0x02 |
| #define | FP_AMPL3_SUB 0x04 |
| #define | CIR_PWR_SUB 0x06 |
| #define | LEN_STD_NOISE 2 |
| #define | LEN_FP_AMPL2 2 |
| #define | LEN_FP_AMPL3 2 |
| #define | LEN_CIR_PWR 2 |
| #define | TX_TIME 0x17 |
| #define | LEN_TX_TIME 10 |
| #define | TX_STAMP_SUB 0 |
| #define | LEN_TX_STAMP LEN_STAMP |
| #define | DX_TIME 0x0A |
| #define | LEN_DX_TIME LEN_STAMP |
| #define | TX_BUFFER 0x09 |
| #define | LEN_TX_BUFFER 1024 |
| #define | LEN_UWB_FRAMES 127 |
| #define | LEN_EXT_UWB_FRAMES 1023 |
| #define | RX_FINFO 0x10 |
| #define | LEN_RX_FINFO 4 |
| #define | RX_BUFFER 0x11 |
| #define | LEN_RX_BUFFER 1024 |
| #define | TX_FCTRL 0x08 |
| #define | LEN_TX_FCTRL 5 |
| #define | CHAN_CTRL 0x1F |
| #define | LEN_CHAN_CTRL 4 |
| #define | DWSFD_BIT 17 |
| #define | TNSSFD_BIT 20 |
| #define | RNSSFD_BIT 21 |
| #define | USR_SFD 0x21 |
| #define | LEN_USR_SFD 41 |
| #define | SFD_LENGTH_SUB 0x00 |
| #define | LEN_SFD_LENGTH 1 |
| #define | OTP_IF 0x2D |
| #define | OTP_ADDR_SUB 0x04 |
| #define | OTP_CTRL_SUB 0x06 |
| #define | OTP_RDAT_SUB 0x0A |
| #define | LEN_OTP_ADDR 2 |
| #define | LEN_OTP_CTRL 2 |
| #define | LEN_OTP_RDAT 4 |
| #define | AGC_TUNE 0x23 |
| #define | AGC_TUNE1_SUB 0x04 |
| #define | AGC_TUNE2_SUB 0x0C |
| #define | AGC_TUNE3_SUB 0x12 |
| #define | LEN_AGC_TUNE1 2 |
| #define | LEN_AGC_TUNE2 4 |
| #define | LEN_AGC_TUNE3 2 |
| #define | DRX_TUNE 0x27 |
| #define | DRX_TUNE0b_SUB 0x02 |
| #define | DRX_TUNE1a_SUB 0x04 |
| #define | DRX_TUNE1b_SUB 0x06 |
| #define | DRX_TUNE2_SUB 0x08 |
| #define | DRX_TUNE4H_SUB 0x26 |
| #define | LEN_DRX_TUNE0b 2 |
| #define | LEN_DRX_TUNE1a 2 |
| #define | LEN_DRX_TUNE1b 2 |
| #define | LEN_DRX_TUNE2 4 |
| #define | LEN_DRX_TUNE4H 2 |
| #define | LDE_IF 0x2E |
| #define | LDE_CFG1_SUB 0x0806 |
| #define | LDE_RXANTD_SUB 0x1804 |
| #define | LDE_CFG2_SUB 0x1806 |
| #define | LDE_REPC_SUB 0x2804 |
| #define | LEN_LDE_CFG1 1 |
| #define | LEN_LDE_CFG2 2 |
| #define | LEN_LDE_REPC 2 |
| #define | LEN_LDE_RXANTD 2 |
| #define | TX_POWER 0x1E |
| #define | LEN_TX_POWER 4 |
| #define | RF_CONF 0x28 |
| #define | RF_RXCTRLH_SUB 0x0B |
| #define | RF_TXCTRL_SUB 0x0C |
| #define | LEN_RF_RXCTRLH 1 |
| #define | LEN_RF_TXCTRL 4 |
| #define | TX_CAL 0x2A |
| #define | TC_PGDELAY_SUB 0x0B |
| #define | LEN_TC_PGDELAY 1 |
| #define | TC_SARC 0x00 |
| #define | TC_SARL 0x03 |
| #define | FS_CTRL 0x2B |
| #define | FS_PLLCFG_SUB 0x07 |
| #define | FS_PLLTUNE_SUB 0x0B |
| #define | FS_XTALT_SUB 0x0E |
| #define | LEN_FS_PLLCFG 4 |
| #define | LEN_FS_PLLTUNE 1 |
| #define | LEN_FS_XTALT 1 |
| #define | PMSC 0x36 |
| #define | PMSC_CTRL0_SUB 0x00 |
| #define | LEN_PMSC_CTRL0 4 |
| #define | TX_ANTD 0x18 |
| #define | LEN_TX_ANTD 2 |
| #define AAT_BIT 3 |
| #define AGC_TUNE 0x23 |
| #define AGC_TUNE1_SUB 0x04 |
| #define AGC_TUNE2_SUB 0x0C |
| #define AGC_TUNE3_SUB 0x12 |
| #define CHAN_CTRL 0x1F |
| #define CIR_PWR_SUB 0x06 |
| #define CLKPLL_LL_BIT 25 |
| #define CPLOCK_BIT 1 |
| #define DEV_ID 0x00 |
| #define DIS_DRXB_BIT 12 |
| #define DIS_STXP_BIT 18 |
| #define DRX_TUNE 0x27 |
| #define DRX_TUNE0b_SUB 0x02 |
| #define DRX_TUNE1a_SUB 0x04 |
| #define DRX_TUNE1b_SUB 0x06 |
| #define DRX_TUNE2_SUB 0x08 |
| #define DRX_TUNE4H_SUB 0x26 |
| #define DWSFD_BIT 17 |
| #define DX_TIME 0x0A |
| #define EUI 0x01 |
| #define FFAA_BIT 4 |
| #define FFAB_BIT 2 |
| #define FFAD_BIT 3 |
| #define FFAM_BIT 5 |
| #define FFAR_BIT 6 |
| #define FFBC_BIT 1 |
| #define FFEN_BIT 0 |
| #define FP_AMPL1_SUB 0x07 |
| #define FP_AMPL2_SUB 0x02 |
| #define FP_AMPL3_SUB 0x04 |
| #define FS_CTRL 0x2B |
| #define FS_PLLCFG_SUB 0x07 |
| #define FS_PLLTUNE_SUB 0x0B |
| #define FS_XTALT_SUB 0x0E |
| #define HIRQ_POL_BIT 9 |
| #define IDLE_MODE 0x00 |
| #define JUNK 0x00 |
| #define LDE_CFG1_SUB 0x0806 |
| #define LDE_CFG2_SUB 0x1806 |
| #define LDE_IF 0x2E |
| #define LDE_REPC_SUB 0x2804 |
| #define LDE_RXANTD_SUB 0x1804 |
| #define LDEDONE_BIT 10 |
| #define LDEERR_BIT 18 |
| #define LEN_AGC_TUNE1 2 |
| #define LEN_AGC_TUNE2 4 |
| #define LEN_AGC_TUNE3 2 |
| #define LEN_CHAN_CTRL 4 |
| #define LEN_CIR_PWR 2 |
| #define LEN_DEV_ID 4 |
| #define LEN_DRX_TUNE0b 2 |
| #define LEN_DRX_TUNE1a 2 |
| #define LEN_DRX_TUNE1b 2 |
| #define LEN_DRX_TUNE2 4 |
| #define LEN_DRX_TUNE4H 2 |
| #define LEN_DX_TIME LEN_STAMP |
| #define LEN_EUI 8 |
| #define LEN_EXT_UWB_FRAMES 1023 |
| #define LEN_FP_AMPL1 2 |
| #define LEN_FP_AMPL2 2 |
| #define LEN_FP_AMPL3 2 |
| #define LEN_FS_PLLCFG 4 |
| #define LEN_FS_PLLTUNE 1 |
| #define LEN_FS_XTALT 1 |
| #define LEN_LDE_CFG1 1 |
| #define LEN_LDE_CFG2 2 |
| #define LEN_LDE_REPC 2 |
| #define LEN_LDE_RXANTD 2 |
| #define LEN_OTP_ADDR 2 |
| #define LEN_OTP_CTRL 2 |
| #define LEN_OTP_RDAT 4 |
| #define LEN_PANADR 4 |
| #define LEN_PHR_MODE_SUB 2 |
| #define LEN_PMSC_CTRL0 4 |
| #define LEN_RF_RXCTRLH 1 |
| #define LEN_RF_TXCTRL 4 |
| #define LEN_RX_BUFFER 1024 |
| #define LEN_RX_FINFO 4 |
| #define LEN_RX_FQUAL 8 |
| #define LEN_RX_STAMP LEN_STAMP |
| #define LEN_RX_TIME 14 |
| #define LEN_SFD_LENGTH 1 |
| #define LEN_STAMP 5 |
| #define LEN_STD_NOISE 2 |
| #define LEN_SYS_CFG 4 |
| #define LEN_SYS_CTRL 4 |
| #define LEN_SYS_MASK 4 |
| #define LEN_SYS_STATUS 5 |
| #define LEN_SYS_TIME LEN_STAMP |
| #define LEN_TC_PGDELAY 1 |
| #define LEN_TX_ANTD 2 |
| #define LEN_TX_BUFFER 1024 |
| #define LEN_TX_FCTRL 5 |
| #define LEN_TX_POWER 4 |
| #define LEN_TX_STAMP LEN_STAMP |
| #define LEN_TX_TIME 10 |
| #define LEN_USR_SFD 41 |
| #define LEN_UWB_FRAMES 127 |
| #define NO_SUB 0xFF |
| #define OTP_ADDR_SUB 0x04 |
| #define OTP_CTRL_SUB 0x06 |
| #define OTP_IF 0x2D |
| #define OTP_RDAT_SUB 0x0A |
| #define PANADR 0x03 |
| #define PHR_MODE_SUB 16 |
| #define PMSC 0x36 |
| #define PMSC_CTRL0_SUB 0x00 |
| #define RF_CONF 0x28 |
| #define RF_RXCTRLH_SUB 0x0B |
| #define RF_TXCTRL_SUB 0x0C |
| #define RFPLL_LL_BIT 24 |
| #define RNSSFD_BIT 21 |
| #define RX_BUFFER 0x11 |
| #define RX_FINFO 0x10 |
| #define RX_FQUAL 0x12 |
| #define RX_MODE 0x01 |
| #define RX_STAMP_SUB 0x00 |
| #define RX_TIME 0x15 |
| #define RXAUTR_BIT 29 |
| #define RXDFR_BIT 13 |
| #define RXDLYS_BIT 9 |
| #define RXENAB_BIT 8 |
| #define RXFCE_BIT 15 |
| #define RXFCG_BIT 14 |
| #define RXM110K_BIT 22 |
| #define RXPHE_BIT 12 |
| #define RXRFSL_BIT 16 |
| #define RXRFTO_BIT 17 |
| #define SFCST_BIT 0 |
| #define SFD_LENGTH_SUB 0x00 |
| #define STD_NOISE_SUB 0x00 |
| #define SYS_CFG 0x04 |
| #define SYS_CTRL 0x0D |
| #define SYS_MASK 0x0E |
| #define SYS_STATUS 0x0F |
| #define SYS_TIME 0x06 |
| #define TC_PGDELAY_SUB 0x0B |
| #define TC_SARC 0x00 |
| #define TC_SARL 0x03 |
| #define TNSSFD_BIT 20 |
| #define TRXOFF_BIT 6 |
| #define TX_ANTD 0x18 |
| #define TX_BUFFER 0x09 |
| #define TX_CAL 0x2A |
| #define TX_FCTRL 0x08 |
| #define TX_MODE 0x02 |
| #define TX_POWER 0x1E |
| #define TX_STAMP_SUB 0 |
| #define TX_TIME 0x17 |
| #define TXDLYS_BIT 2 |
| #define TXFRB_BIT 4 |
| #define TXFRS_BIT 7 |
| #define TXPHS_BIT 6 |
| #define TXPRS_BIT 5 |
| #define TXSTRT_BIT 1 |
| #define USR_SFD 0x21 |
| #define WAIT4RESP_BIT 7 |
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