v_hdmitxss
Vitis Drivers API Documentation
si5324drv.h File Reference

Overview

This file contains definitions for low-level driver functions for controlling the SiliconLabs Si5324 clock generator as mounted on the KC705 demo board.

The user should refer to the hardware device specification for more details of the device operation.

MODIFICATION HISTORY:
Ver   Who  Date        Changes


1.00 hf 2014/10/10 First release 1.1 gm 2017/06/23 Added Si5324_Reset in API declaration yh 2017/07/19 Added SI5324 control using PS IIC

Macros

#define SI5324_XTAL_FREQ   114285000
 The frequency of the crystal connected to the XA/XB pins of the Si5324 in Hz. More...
 
#define SI5324_DEBUG   FALSE
 Debug output enable. More...
 
#define SI5324_SUCCESS   0
 The following constants are error codes generated by the functions in this driver. More...
 
#define SI5324_ERR_IIC   -1
 IIC error occurred. More...
 
#define SI5324_ERR_FREQ   -2
 Could not calculate frequency setting. More...
 
#define SI5324_ERR_PARM   -3
 Invalid parameter. More...
 
#define SI5324_CLKSRC_CLK1   1
 The following constants define the clock input select values. More...
 
#define SI5324_CLKSRC_CLK2   2
 Use clock input 2. More...
 
#define SI5324_CLKSRC_XTAL   3
 Use crystal (free running mode) More...
 
#define SI5324_FOSC_MIN   4850000000
 The following constants define the limits of the Si5324 frequencies. More...
 
#define SI5324_FOSC_MAX   5670000000
 Maximum oscillator frequency. More...
 
#define SI5324_F3_MAX   2000000
 Maximum phase detector frequency. More...
 
#define SI5324_FIN_MIN   2000
 Minimum input frequency. More...
 
#define SI5324_FIN_MAX   710000000
 Maximum input frequency. More...
 
#define SI5324_FOUT_MIN   2000
 Minimum output frequency. More...
 
#define SI5324_FOUT_MAX   945000000
 Maximum output frequency. More...
 
#define SI5324_N1_HS_MIN   6
 The following constants define the limits of the divider settings. More...
 
#define SI5324_N1_HS_MAX   11
 Maximum N1_HS setting. More...
 
#define SI5324_NC_LS_MIN   1
 Minimum NCn_LS setting (1 and even values) More...
 
#define SI5324_NC_LS_MAX   0x100000
 Maximum NCn_LS setting (1 and even values) More...
 
#define SI5324_N2_HS_MIN   4
 Minimum NC2_HS setting. More...
 
#define SI5324_N2_HS_MAX   11
 Maximum NC2_HS setting. More...
 
#define SI5324_N2_LS_MIN   2
 Minimum NC2_LS setting (even values only) More...
 
#define SI5324_N2_LS_MAX   0x100000
 Maximum NC2_LS setting (even values only) More...
 
#define SI5324_N3_MIN   1
 Minimum N3n setting. More...
 
#define SI5324_N3_MAX   0x080000
 Maximum N3n setting. More...
 

Functions

int Si5324_Init (u32 IICBaseAddress, u8 IICAddress)
 Initialize the SiliconLabs Si5324 clock generator. More...
 
int Si5324_CalcFreqSettings (u32 ClkInFreq, u32 ClkOutFreq, u8 *N1_hs, u32 *NCn_ls, u8 *N2_hs, u32 *N2_ls, u32 *N3n, u8 *BwSel)
 Calculate the frequency settings for the desired output frequency. More...
 
int Si5324_SetClock (u32 IICBaseAddress, u8 IICAddress, u8 ClkSrc, u32 ClkInFreq, u32 ClkOutFreq)
 Set the output frequency. More...
 
int Si5324_Reset (u32 IICBaseAddress, u8 IICAddress)
 Reset the SiliconLabs Si5324 clock generator. More...
 

Macro Definition Documentation

#define SI5324_CLKSRC_CLK1   1

The following constants define the clock input select values.

Use clock input 1

Referenced by Si5324_SetClock().

#define SI5324_CLKSRC_CLK2   2

Use clock input 2.

Referenced by Si5324_SetClock().

#define SI5324_CLKSRC_XTAL   3

Use crystal (free running mode)

Referenced by Si5324_SetClock().

#define SI5324_DEBUG   FALSE

Debug output enable.

Set to TRUE to enable debug prints, to FALSE to disable debug prints.

Referenced by Si5324_CalcFreqSettings(), Si5324_DoSettings(), Si5324_FindN2(), Si5324_FindN2ls(), Si5324_FindNcls(), Si5324_Init(), Si5324_Reset(), and Si5324_SetClock().

#define SI5324_ERR_FREQ   -2

Could not calculate frequency setting.

Referenced by Si5324_CalcFreqSettings().

#define SI5324_ERR_IIC   -1

IIC error occurred.

Referenced by Si5324_DoSettings(), and Si5324_Reset().

#define SI5324_ERR_PARM   -3

Invalid parameter.

Referenced by Si5324_DoSettings(), and Si5324_SetClock().

#define SI5324_F3_MAX   2000000

Maximum phase detector frequency.

Referenced by Si5324_CalcFreqSettings(), Si5324_FindN2(), and Si5324_FindN2ls().

#define SI5324_FIN_MAX   710000000

Maximum input frequency.

Referenced by Si5324_SetClock().

#define SI5324_FIN_MIN   2000

Minimum input frequency.

Referenced by Si5324_SetClock().

#define SI5324_FOSC_MAX   5670000000

Maximum oscillator frequency.

Referenced by Si5324_CalcFreqSettings(), and Si5324_FindN2ls().

#define SI5324_FOSC_MIN   4850000000

The following constants define the limits of the Si5324 frequencies.

Minimum oscillator frequency

Referenced by Si5324_CalcFreqSettings(), and Si5324_FindN2ls().

#define SI5324_FOUT_MAX   945000000

Maximum output frequency.

Referenced by Si5324_FindN2ls(), and Si5324_SetClock().

#define SI5324_FOUT_MIN   2000

Minimum output frequency.

Referenced by Si5324_FindN2ls(), and Si5324_SetClock().

#define SI5324_N1_HS_MAX   11

Maximum N1_HS setting.

Referenced by Si5324_CalcFreqSettings().

#define SI5324_N1_HS_MIN   6

The following constants define the limits of the divider settings.

Minimum N1_HS setting (4 and 5 are for higher output frequencies than we support

Referenced by Si5324_CalcFreqSettings().

#define SI5324_N2_HS_MAX   11

Maximum NC2_HS setting.

Referenced by Si5324_FindN2().

#define SI5324_N2_HS_MIN   4

Minimum NC2_HS setting.

Referenced by Si5324_FindN2().

#define SI5324_N2_LS_MAX   0x100000

Maximum NC2_LS setting (even values only)

Referenced by Si5324_FindN2().

#define SI5324_N2_LS_MIN   2

Minimum NC2_LS setting (even values only)

Referenced by Si5324_FindN2().

#define SI5324_N3_MAX   0x080000

Maximum N3n setting.

Referenced by Si5324_CalcFreqSettings().

#define SI5324_N3_MIN   1

Minimum N3n setting.

Referenced by Si5324_CalcFreqSettings().

#define SI5324_NC_LS_MAX   0x100000

Maximum NCn_LS setting (1 and even values)

Referenced by Si5324_CalcFreqSettings(), and Si5324_CalcNclsLimits().

#define SI5324_NC_LS_MIN   1

Minimum NCn_LS setting (1 and even values)

Referenced by Si5324_CalcFreqSettings(), and Si5324_CalcNclsLimits().

#define SI5324_SUCCESS   0

The following constants are error codes generated by the functions in this driver.

Operation was successful

Referenced by Si5324_CalcFreqSettings(), Si5324_DoSettings(), Si5324_Reset(), and Si5324_SetClock().

#define SI5324_XTAL_FREQ   114285000

The frequency of the crystal connected to the XA/XB pins of the Si5324 in Hz.

Function Documentation

int Si5324_CalcFreqSettings ( u32  ClkInFreq,
u32  ClkOutFreq,
u8 *  N1_hs,
u32 *  NCn_ls,
u8 *  N2_hs,
u32 *  N2_ls,
u32 *  N3n,
u8 *  BwSel 
)

Calculate the frequency settings for the desired output frequency.

Parameters
ClkInFreqcontains the frequency of the input clock.
ClkOutFreqcontains the desired output clock frequency.
N1_hswill be set to the value for the N1_HS register.
NCn_lswill be set to the value for the NCn_LS register.
N2_hswill be set to the value for the N2_HS register.
N2_lswill be set to the value for the N2_LS register.
N3nwill be set to the value for the N3n register.
BwSelwill be set to the value for the BW_SEL register.
Returns
SI5324_SUCCESS for success, SI5324_ERR_FREQ when the requested frequency cannot be generated.
Note
Private function.

References Si5324_CalcNclsLimits(), SI5324_DEBUG, SI5324_ERR_FREQ, SI5324_F3_MAX, Si5324_FindNcls(), SI5324_FOSC_MAX, SI5324_FOSC_MIN, SI5324_N1_HS_MAX, SI5324_N1_HS_MIN, SI5324_N3_MAX, SI5324_N3_MIN, SI5324_NC_LS_MAX, SI5324_NC_LS_MIN, and SI5324_SUCCESS.

Referenced by Si5324_SetClock().

int Si5324_Init ( u32  IICBaseAddress,
u8  IICAddress 
)

Initialize the SiliconLabs Si5324 clock generator.

After initialization, the clock generator is not generating a clock yet. Call si5324_set_clock to start the clock generator.

Parameters
IICBaseAddresscontains the base address of the IIC master device.
IICAddresscontains the 7 bit IIC address of the Si5324 device.
Returns
SI5324_SUCCESS for success, SI5324_ERR_IIC for IIC access failure.

References SI5324_DEBUG, SI5324_DEFAULTS, and Si5324_DoSettings().

int Si5324_Reset ( u32  IICBaseAddress,
u8  IICAddress 
)

Reset the SiliconLabs Si5324 clock generator.

Parameters
IICBaseAddresscontains the base address of the IIC master device.
IICAddresscontains the 7 bit IIC address of the Si5324 device.
Returns
SI5324_SUCCESS for success, SI5324_ERR_IIC for IIC access failure.
Note
Private function.

References SI5324_DEBUG, Si5324_DoSettings(), SI5324_ERR_IIC, and SI5324_SUCCESS.

int Si5324_SetClock ( u32  IICBaseAddress,
u8  IICAddress,
u8  ClkSrc,
u32  ClkInFreq,
u32  ClkOutFreq 
)

Set the output frequency.

Parameters
IICBaseAddresscontains the base address of the IIC master device.
IICAddresscontains the 7 bit IIC address of the Si5324 device.
ClkSrcselects the clock input to use.
ClkInFreqcontains the frequency of the input clock.
ClkOutFreqcontains the desired output clock frequency
Returns
SI5324_SUCCESS for success, SI5324_ERR_IIC for IIC access failure, SI5324_ERR_FREQ when the requested frequency cannot be generated.

Set the output frequency.

Parameters
IICBaseAddresscontains the base address of the IIC master device.
IICAddresscontains the 7 bit IIC address of the Si5324 device.
ClkSrcselects the clock input to use.
ClkInFreqcontains the frequency of the input clock (2kHz-710MHz).
ClkOutFreqcontains the desired output clock frequency (2kHz-945MHz).
Returns
SI5324_SUCCESS for success, SI5324_ERR_IIC for IIC access failure, SI5324_ERR_FREQ when the requested frequency cannot be generated, SI5324_ERR_PARM when the ClkSrc or ClkDest parameters are invalid or the ClkInFreq or ClkOutFreq are out of range.

References Si5324_CalcFreqSettings(), SI5324_CLKSRC_CLK1, SI5324_CLKSRC_CLK2, SI5324_CLKSRC_XTAL, SI5324_DEBUG, Si5324_DoSettings(), SI5324_ERR_PARM, SI5324_FIN_MAX, SI5324_FIN_MIN, SI5324_FOUT_MAX, SI5324_FOUT_MIN, and SI5324_SUCCESS.