dp14txss
Vitis Drivers API Documentation
XDpTxSs_Config Struct Reference

This typedef contains configuration information for the DisplayPort Transmitter Subsystem core. More...

Data Fields

u16 DeviceId
 DeviceId is the unique ID of the DisplayPort TX Subsystem core. More...
 
UINTPTR BaseAddress
 BaseAddress is the physical base address of the core's registers. More...
 
u8 SecondaryChEn
 This Subsystem core supports audio packets being sent by the secondary channel. More...
 
u8 MaxBpc
 The maximum bits/color supported by this Subsystem core. More...
 
u8 HdcpEnable
 This Subsystem core supports digital content protection. More...
 
u8 Hdcp22Enable
 This Subsystem core supports digital content protection(HDCP22). More...
 
u8 MaxLaneCount
 The maximum lane count supported by this core instance. More...
 
u8 MstSupport
 Multi-stream transport (MST) mode is enabled by this core instance. More...
 
u8 NumMstStreams
 The total number of MST streams supported by this core instance. More...
 
XDpTxSs_TmrCtrSubCore TmrCtrSubCore
 Timer Counter Configuration. More...
 
XDpTxSs_DpSubCore DpSubCore
 DisplayPort Configuration. More...
 
XDpTxSs_Hdcp1xSubCore Hdcp1xSubCore
 HDCP Configuration. More...
 
XDpTxSs_Hdcp22SubCore Hdcp22SubCore
 HDCP22 Configuration. More...
 
XDpTxSs_DsSubCore DsSubCore
 Dual Splitter Configuration. More...
 
XDpTxSs_VtcSubCore VtcSubCore [XDPTXSS_NUM_STREAMS]
 VTC Configura- tion. More...
 

Detailed Description

This typedef contains configuration information for the DisplayPort Transmitter Subsystem core.

Each DisplayPort TX Subsystem core should have a configuration structure associated.

Field Documentation

UINTPTR XDpTxSs_Config::BaseAddress
u16 XDpTxSs_Config::DeviceId

DeviceId is the unique ID of the DisplayPort TX Subsystem core.

Referenced by XDpTxSs_CfgInitialize().

XDpTxSs_DpSubCore XDpTxSs_Config::DpSubCore

DisplayPort Configuration.

Referenced by XDpTxSs_CfgInitialize(), and XDpTxSs_Reset().

XDpTxSs_DsSubCore XDpTxSs_Config::DsSubCore

Dual Splitter Configuration.

XDpTxSs_Hdcp1xSubCore XDpTxSs_Config::Hdcp1xSubCore

HDCP Configuration.

u8 XDpTxSs_Config::Hdcp22Enable

This Subsystem core supports digital content protection(HDCP22).

Referenced by XDpTxSs_Authenticate(), XDpTxSs_CfgInitialize(), XDpTxSs_DisableEncryption(), XDpTxSs_EnableEncryption(), XDpTxSs_HdcpEnable(), and XDpTxSs_IsAuthenticated().

XDpTxSs_Hdcp22SubCore XDpTxSs_Config::Hdcp22SubCore

HDCP22 Configuration.

Referenced by XDpTxSs_SubcoreInitHdcp22().

u8 XDpTxSs_Config::MaxBpc

The maximum bits/color supported by this Subsystem core.

Referenced by XDpTxSs_CfgInitialize(), and XDpTxSs_ReportCoreInfo().

u8 XDpTxSs_Config::MaxLaneCount

The maximum lane count supported by this core instance.

Referenced by XDpTxSs_ReportCoreInfo().

u8 XDpTxSs_Config::MstSupport

Multi-stream transport (MST) mode is enabled by this core instance.

Referenced by DpTxSs_HpdEventHandler(), XDpTxSs_CfgInitialize(), and XDpTxSs_ReportCoreInfo().

u8 XDpTxSs_Config::NumMstStreams

The total number of MST streams supported by this core instance.

Referenced by XDpTxSs_CfgInitialize(), XDpTxSs_ReportCoreInfo(), XDpTxSs_ReportMsaInfo(), XDpTxSs_ReportVtcInfo(), XDpTxSs_Reset(), XDpTxSs_SelfTest(), and XDpTxSs_Stop().

u8 XDpTxSs_Config::SecondaryChEn

This Subsystem core supports audio packets being sent by the secondary channel.

Referenced by XDpTxSs_ReportCoreInfo().

XDpTxSs_TmrCtrSubCore XDpTxSs_Config::TmrCtrSubCore

Timer Counter Configuration.

Referenced by XDpTxSs_CfgInitialize().

XDpTxSs_VtcSubCore XDpTxSs_Config::VtcSubCore[XDPTXSS_NUM_STREAMS]

VTC Configura- tion.

Referenced by XDpTxSs_CfgInitialize().