dp14rxss
Vitis Drivers API Documentation
XDpRxSs_Config Struct Reference

This typedef contains configuration information for the DisplayPort Receiver Subsystem core. More...

Data Fields

u16 DeviceId
 DeviceId is the unique ID of the DisplayPort RX Subsystem core. More...
 
UINTPTR BaseAddress
 BaseAddress is the physical base address of the core's registers. More...
 
u8 SecondaryChEn
 This Subsystem core supports audio packets being sent by the secondary channel. More...
 
u8 MaxNumAudioCh
 The total number of Audio channels supported by this core instance. More...
 
u8 MaxBpc
 The maximum bits/color supported by this Subsystem core. More...
 
u8 HdcpEnable
 This Subsystem core supports digital content protection. More...
 
u8 Hdcp22Enable
 This Subsystem core supports digital content protection(HDCP22). More...
 
u8 MaxLaneCount
 The maximum lane count supported by this core instance. More...
 
u8 MstSupport
 Multi-stream transport (MST) mode is enabled by this core instance. More...
 
u8 NumMstStreams
 The total number of MST streams supported by this core instance. More...
 
u8 ColorFormat
 Type of color format supported by this core instance. More...
 
u8 IncludeClkWiz
 < axi i2c support > More...
 
XDpRxSs_IicSubCore IicSubCore
 < clocking wizard support for dec_clk > More...
 
XDpRxSs_TmrCtrSubCore TmrCtrSubCore
 Timer Counter Configuration. More...
 
XDpRxSs_ClkWizSubCore ClkWizSubCore
 Clocking Wizard Configuration. More...
 
XDpRxSs_DpSubCore DpSubCore
 DisplayPort Configuration. More...
 
XDpRxSs_Hdcp1xSubCore Hdcp1xSubCore
 HDCP Configuration. More...
 

Detailed Description

This typedef contains configuration information for the DisplayPort Receiver Subsystem core.

Each DisplayPort RX Subsystem core should have a configuration structure associated.

Field Documentation

UINTPTR XDpRxSs_Config::BaseAddress
XDpRxSs_ClkWizSubCore XDpRxSs_Config::ClkWizSubCore

Clocking Wizard Configuration.

Referenced by XDpRxSs_CfgInitialize().

u8 XDpRxSs_Config::ColorFormat

Type of color format supported by this core instance.

Referenced by XDpRxSs_ReportCoreInfo().

u16 XDpRxSs_Config::DeviceId

DeviceId is the unique ID of the DisplayPort RX Subsystem core.

XDpRxSs_DpSubCore XDpRxSs_Config::DpSubCore

DisplayPort Configuration.

Referenced by XDpRxSs_CfgInitialize().

XDpRxSs_Hdcp1xSubCore XDpRxSs_Config::Hdcp1xSubCore

HDCP Configuration.

Referenced by XDpRxSs_CfgInitialize().

u8 XDpRxSs_Config::Hdcp22Enable

This Subsystem core supports digital content protection(HDCP22).

Referenced by XDpRxSs_CfgInitialize(), XDpRxSs_HdcpDisable(), XDpRxSs_HdcpEnable(), and XDpRxSs_SetLane().

XDpRxSs_IicSubCore XDpRxSs_Config::IicSubCore

< clocking wizard support for dec_clk >

IIC Configuration

Referenced by XDpRxSs_CfgInitialize().

u8 XDpRxSs_Config::IncludeClkWiz

< axi i2c support >

Referenced by XDpRxSs_CfgInitialize().

u8 XDpRxSs_Config::MaxBpc

The maximum bits/color supported by this Subsystem core.

Referenced by XDpRxSs_CfgInitialize(), and XDpRxSs_ReportCoreInfo().

u8 XDpRxSs_Config::MaxLaneCount

The maximum lane count supported by this core instance.

Referenced by XDpRxSs_CfgInitialize(), and XDpRxSs_ReportCoreInfo().

u8 XDpRxSs_Config::MaxNumAudioCh

The total number of Audio channels supported by this core instance.

Referenced by XDpRxSs_ReportCoreInfo().

u8 XDpRxSs_Config::MstSupport

Multi-stream transport (MST) mode is enabled by this core instance.

Referenced by XDpRxSs_CfgInitialize(), and XDpRxSs_ReportCoreInfo().

u8 XDpRxSs_Config::NumMstStreams

The total number of MST streams supported by this core instance.

Referenced by XDpRxSs_CfgInitialize(), XDpRxSs_ExposePort(), XDpRxSs_ReportCoreInfo(), and XDpRxSs_ReportMsaInfo().

u8 XDpRxSs_Config::SecondaryChEn

This Subsystem core supports audio packets being sent by the secondary channel.

Referenced by XDpRxSs_ReportCoreInfo().

XDpRxSs_TmrCtrSubCore XDpRxSs_Config::TmrCtrSubCore

Timer Counter Configuration.

Referenced by XDpRxSs_CfgInitialize().