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csi2txss
Vitis Drivers API Documentation
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csi2txss
Vitis Drivers API Documentation
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MIPI CSI Tx Subsystem configuration structure. More...
Data Fields | |
| u32 | DeviceId |
| DeviceId is the unique ID of the device. More... | |
| UINTPTR | BaseAddr |
| BaseAddress is the physical base address of the subsystem address range. More... | |
| UINTPTR | HighAddr |
| HighAddress is the physical MAX address of the subsystem address range. More... | |
| u32 | LanesPresent |
| Active Lanes programming optimization enabled. More... | |
| u32 | PixelFormat |
1 - Single pixel per beat 2 - Dual pixels per beat 4 - Quad pixels per beat More... | |
| u32 | CsiBuffDepth |
| Line buffer Depth set. More... | |
| u32 | DphyLineRate |
| DPHY Line Rate ranging from 80-1500 Mbps. More... | |
| u32 | IsDphyRegIntfcPresent |
| Flag for DPHY register interface presence. More... | |
| u32 | FEGenEnabled |
| Frame End Generation enabled flag. More... | |
| SubCoreCsi2Tx | CsiInfo |
| CSI sub-core configuration. More... | |
| SubCoreCsi2Tx | DphyInfo |
| DPHY sub-core configuration. More... | |
MIPI CSI Tx Subsystem configuration structure.
Each subsystem device should have a configuration structure associated that defines the MAX supported sub-cores within subsystem
| UINTPTR XCsi2TxSs_Config::BaseAddr |
BaseAddress is the physical base address of the subsystem address range.
Referenced by Csi2TxSs_IntrExample(), Csi2TxSs_SelfTestExample(), and XCsi2TxSs_CfgInitialize().
| u32 XCsi2TxSs_Config::CsiBuffDepth |
Line buffer Depth set.
| SubCoreCsi2Tx XCsi2TxSs_Config::CsiInfo |
CSI sub-core configuration.
| u32 XCsi2TxSs_Config::DeviceId |
DeviceId is the unique ID of the device.
| SubCoreCsi2Tx XCsi2TxSs_Config::DphyInfo |
DPHY sub-core configuration.
| u32 XCsi2TxSs_Config::DphyLineRate |
DPHY Line Rate ranging from 80-1500 Mbps.
| u32 XCsi2TxSs_Config::FEGenEnabled |
Frame End Generation enabled flag.
Referenced by XCsi2TxSs_Configure(), XCsi2TxSs_GetLineCountForVC(), XCsi2TxSs_IntrDisable(), and XCsi2TxSs_SetLineCountForVC().
| UINTPTR XCsi2TxSs_Config::HighAddr |
HighAddress is the physical MAX address of the subsystem address range.
| u32 XCsi2TxSs_Config::IsDphyRegIntfcPresent |
Flag for DPHY register interface presence.
Referenced by XCsi2TxSs_Activate(), XCsi2TxSs_CfgInitialize(), and XCsi2TxSs_ReportCoreInfo().
| u32 XCsi2TxSs_Config::LanesPresent |
Active Lanes programming optimization enabled.
| u32 XCsi2TxSs_Config::PixelFormat |
1 - Single pixel per beat
2 - Dual pixels per beat 4 - Quad pixels per beat